A multitude of semiconductor devices are typically fabricated on a single semiconductor wafer. Following a fabrication process sequence, individual devices or “die” are typically separated or “diced” from the wafer by sawing or laser scribing. These die are then incorporated within a packaging structure generally designed to seal the active area of the die and electrically interconnect device terminals with those of an external circuit. When devices are packaged using flip-chip bonding, solder beads or “bumps” are reflowed and used to connect conductive terminal recesses on the device to metal leads within the package. The active side of the device including the soldered interconnects is then encapsulated by an underfilling sealant that, when cured, provides an environmentally resistant barrier.
However, such a packaging process has drawbacks. The dicing process can potentially generate cracks at edges of a die that may propagate through device layers into the active region and/or break through solder connections and lead to device failure. Further, because the adhesive bond between the underfilling sealant and surface passivation layers of the device is often weak, delamination at this interface may occur, exposing the active region to potentially damaging environmental incursions. To alleviate these problems, sealing structures that circumscribe the outer surface of the active region have been incorporated into the design layout of many semiconductor devices. These structures are typically made from materials such as copper or aluminum that have improved adhesion to underfilling sealants, and higher fracture toughness more suitable for terminating interlayer crack propagation. However, these structures are still susceptible to cracking and provide only marginal additional adhesive bond strength. Therefore, a more robust system is desirable to address both failure modes and provide improved reliability in such devices.
Accordingly, it is desirable to provide semiconductor devices having filled trench structures designed to terminate interlayer crack propagation and improve adhesion to a packaging sealant. Further, it is also desirable to provide methods for fabricating such semiconductor devices. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.